Author : Amruta S. Vhatkar and P.C.Bhaskar

Reconfigure ability denotes reconfigurable computing capabilities of a system, so that its behavior can be changed by reconfiguration with improvements in capacity & performance. Application specific instruction set processor is bridge between ASIC & DSP. This research works based on Xilinx System Generator which support for runtime reconfiguration which further controls ASIP.FIR (Finite Impulse Response) filter is configured for different taps & methods.1-D signal i.e., ECG (Electrocardiogram) is taken for filtration, which having Gaussian noise also known as EMG noise. A generalized instrumentation signal which needs Filters are also taken for computation. This proposed work is implemented on Spartan xc3s500e-4fg320 board and pin N17, H18 are configured as reconfigurable switch which will give facility for applying different type of filter at run time. The results of different filter design techniques are analyzed using Matlab simulation tool and performance is evaluated based on signal to noise ratio.

Keywords: ECG, FIR filters, ASIP, signals to noise ratio (SNR), FPGA, Reconfigurable.

Article published in International Journal of Current  Engineering  and Technology, Vol.4,No.3 (June- 2014)